Not Applicable
Not Applicable
The present invention relates generally to the field of conductive polymer positive temperature coefficient (PTC) devices. More specifically, it relates to conductive polymer PTC devices that are of laminar construction, with more than a single layer of conductive polymer PTC material, and that are especially configured for surface-mount installations.
Electronic devices that include an element made from a conductive polymer have become increasingly popular, being used in a variety of applications. They have achieved widespread usage, for example, in overcurrent protection and self-regulating heater applications, in which a polymeric material having a positive temperature coefficient of resistance is employed. Examples of positive temperature coefficient (PTC) polymeric materials, and of devices incorporating such materials, are disclosed in the following U.S. Pat. Nos.:
3,823,217xe2x80x94Kampe
4,237,441xe2x80x94van Konynenburg
4,238,812xe2x80x94Middleman et al.
4,317,027xe2x80x94Middleman et al.
4,329,726xe2x80x94Middleman et al.
4,413,301xe2x80x94Middleman et al.
4,426,633xe2x80x94Taylor
4,445,026xe2x80x94Walker
4,481,498xe2x80x94McTavish et al.
4,545,926xe2x80x94Fouts, Jr. et al.
4,639,818xe2x80x94Cherian
4,647,894xe2x80x94Ratell
4,647,896xe2x80x94Ratell
4,685,025xe2x80x94Carlomagno
4,774,024xe2x80x94Deep et al.
4,689,475xe2x80x94Kleiner et al.
4,732,701xe2x80x94Nishii et al.
4,769,901xe2x80x94Nagahori
4,787,135xe2x80x94Nagahori
4,800,253xe2x80x94Kleiner et al.
4,849,133xe2x80x94Yoshida et al.
4,876,439xe2x80x94Nagahori
4,884,163xe2x80x94Deep et al.
4,907,340xe2x80x94Fang et al.
4,951,382xe2x80x94Jacobs et al.
4,951,384xe2x80x94Jacobs et al.
4,955,267xe2x80x94Jacobs et al.
4,980,541xe2x80x94Shafe et al.
5,049,850xe2x80x94Evans
5,140,297xe2x80x94Jacobs et al.
5,171,774xe2x80x94Ueno et al.
5,174,924xe2x80x94Yamada et al.
5,178,797xe2x80x94Evans
5,181,006xe2x80x94Shafe et al.
5,190,697xe2x80x94Ohkita et al.
5,195,013xe2x80x94Jacobs et al.
5,227,946xe2x80x94Jacobs et al.
5,241,741xe2x80x94Sugaya
5,250,228xe2x80x94Baigrie et al.
5,280,263xe2x80x94Sugaya
5,358,793xe2x80x94Hanada et al.
One common type of construction for conductive polymer PTC devices is that which may be described as a laminated structure. Laminated conductive polymer PTC devices typically comprise a single layer of conductive polymer material sandwiched between a pair of metallic electrodes, the latter preferably being a highly-conductive, thin metal foil. See, for example, U.S. Pat. Nos. 4,426,633xe2x80x94Taylor; 5,089,801xe2x80x94Chan et al.; 4,937,551xe2x80x94Plasko; 4,787,135xe2x80x94Nagahori; 5,669,607xe2x80x94McGuire et al.; and 5,802,709xe2x80x94Hogge et al.; and International Publication Nos. WO97/06660 and WO98/12715.
A relatively recent development in this technology is the multilayer laminated device, in which two or more layers of conductive polymer material are separated by alternating metallic electrode layers (typically metal foil), with the outermost layers likewise being metal electrodes. The result is a device comprising two or more parallel-connected conductive polymer PTC devices in a single package. The advantages of this multilayer construction are reduced surface area (xe2x80x9cfootprintxe2x80x9d) taken by the device on a circuit board, and a higher current-carrying capacity, as compared with single layer devices.
In meeting a demand for higher component density on circuit boards, the trend in the industry has been toward increasing use of surface mount components as a space-saving measure. Surface mount conductive polymer PTC devices heretofore available have been generally limited to hold currents below about 2.5 amps for packages with a board footprint that generally measures about 9.5 mm by about 6.7 mm. Recently, devices with a footprint of about 4.7 mm by about 3.4 mm, with a hold current of about 1.1 amps, have become available. Still, this footprint is considered relatively large by current surface mount technology (SMT) standards.
The major limiting factors in the design of very small SMT conductive polymer PTC devices are the limited surface area and the lower limits on the resistivity that can be achieved by loading the polymer material with a conductive filler (typically carbon black). The fabrication of useful devices with a volume resistivity of less than about 0.2 ohm-cm has not been practical. First, there are difficulties inherent in the fabrication process when dealing with such low volume resistivities. Second, devices with such a low volume resistivity do not exhibit a large PTC effect, and thus are not very useful as circuit protection devices.
The steady state heat transfer equation for a conductive polymer PTC device may be given as:
0=[I2R(f(Td))]xe2x88x92[U(Tdxe2x88x92Ta)],xe2x80x83xe2x80x83(1)
where I is the steady state current passing through the device; R(f(Td)) is the resistance of the device, as a function of its temperature and its characteristic xe2x80x9cresistance/temperature functionxe2x80x9d or xe2x80x9cR/T curvexe2x80x9d; U is the effective heat transfer coefficient of the device; Td is temperature of the device; and Ta is the ambient temperature.
The xe2x80x9chold currentxe2x80x9d for such a device may be defined as the value of I necessary to trip the device from a low resistance state to a high resistance state. For a given device, where U is fixed, the only way to increase the hold current is to reduce the value of R.
The governing equation for the resistance of any resistive device can be stated as
xe2x80x83R=xcfx81L/A,xe2x80x83xe2x80x83(2)
where xcfx81 is the volume resistivity of the resistive material in ohm-cm, L is the current flow path length through the device in cm, and A is the effective cross-sectional area of the current path in cm2.
Thus, the value of R can be reduced either by reducing the volume resistivity xcfx81, or by increasing the cross-sectional area A of the device.
The value of the volume resistivity xcfx81 can be decreased by increasing the proportion of the conductive filler loaded into the polymer. The practical limitations of doing this, however, are noted above.
A more practical approach to reducing the resistance value R is to increase the cross-sectional area A of the device. Besides being relatively easy to implement (from both a process standpoint and from the standpoint of producing a device with useful PTC characteristics), this method has an additional benefit: In general, as the area of the device increases, the value of the heat transfer coefficient also increases, thereby further increasing the value of the hold current.
In SMT applications, however, it is necessary to minimize the effective surface area or footprint of the device. This puts a severe constraint on the effective cross-sectional area of the PTC element in the device. Thus, for a device of any given footprint, there is an inherent limitation in the maximum hold current value that can be achieved. Viewed another way, decreasing the footprint can be practically achieved only by reducing the hold current value.
There has thus been a long-felt need for SMT conductive polymer PTC devices that have very small footprints while achieving relatively high hold currents. Applicant""s co-pending application Ser. No. 09/035,196, now U.S. Pat. No. 6,172,591 B1 (the disclosure of which is incorporated herein by reference) discloses a multilayer SMT conductive polymer PTC device that meets these criteria, as well as a method for fabricating such a device. More efficient and economical methods of manufacturing such devices have, nevertheless, been sought. Furthermore, even higher hold currents for a given footprint continue to be desired.
Broadly, the present invention is a conductive polymer PTC device that has a relatively high hold current while maintaining a very small circuit board footprint. This result is achieved by a multilayer construction that provides an increased effective cross-sectional area A of the current flow path for a given circuit board footprint. In effect, the multilayer construction of the invention provides, in a single, small-footprint surface mount package, two or more PTC devices electrically connected in parallel.
In one aspect, the present invention is a conductive polymer PTC device comprising, in a preferred embodiment, two laminated substructures, each comprising a conductive polymer PTC layer laminated between a pair of metal foil layers, wherein the two laminated substructures are bonded to each other by a fiberglass-reinforced epoxy (xe2x80x9cprepregxe2x80x9d) layer. Each of the two laminated substructures constitutes a single conductive polymer PTC device, with the foil layers forming electrodes for the devices. The prepreg layer bonds the two devices together, while insulating them from each other. The electrodes are connected by metal-plated termination elements to form a dual-layer conductive polymer PTC device that comprises two single-layer conductive polymer PTC devices connected to each other in parallel. In the preferred embodiment, the termination elements are configured as surface mount terminations.
Specifically, two of the metal layers form, respectively, first and second external electrodes, while the two remaining metal layers form first and second internal electrodes that are physically and electrically separated by the prepreg bonding layer. A first conductive polymer PTC element is located between the first external electrode and the first internal electrode, and a second conductive polymer PTC element is located between the second internal electrode and the second external electrode. First and second termination elements are formed so as to be in physical contact with both of the conductive polymer layers. The electrodes are staggered so that the first external electrode and the second internal electrode are in electrical contact with the first termination element, and the first internal electrode and the second external electrode are in electrical contact with the second termination element. One of the termination elements serves as an input terminal, and the other serves as an output terminal.
In such an embodiment, if the first termination element is the input terminal and the second termination element is the output terminal, then the current input to the first conductive polymer PTC element is through the first external electrode, and the current input to the second conductive polymer PTC element is through the second internal electrode. Output from the first conductive polymer PTC element is through the first internal electrode, and output from the second conductive polymer PTC element is through the second external electrode.
Thus, the resulting device is, effectively, two PTC devices connected in parallel. This construction provides the advantages of a significantly increased effective cross-sectional area for the current flow path, as compared to a single layer device, without increasing the footprint. Thus, for a given footprint, a larger hold current can be achieved.
In another aspect, the present invention is a method of fabricating the above-described device. This method comprises the steps of; (1) providing (a) a first laminated substructure comprising a first conductive polymer PTC layer sandwiched between first and second metal foil layers, and (b) a second laminated substructure comprising a second conductive polymer PTC layer sandwiched between third and fourth metal foil layers; (2) isolating selected areas of the second and third metal layers to form, respectively, first and second internal arrays of internal metal strips; (3) bonding the first and second laminated substructures together with a prepreg layer between the second and third foil layers to form a laminated structure comprising the first conductive polymer PTC layer sandwiched between the first and second foil layers, the prepreg layer sandwiched between the second and third foil layers, and the second conductive polymer PTC layer sandwiched between the third and fourth foil layers; (4) isolating selected areas of the first and fourth metal layers to form, respectively, first and second external arrays of external metal strips; (5) forming a plurality of insulation areas on the exterior surfaces of each of the external metal strips; and (6) forming a plurality of first terminals, each electrically connecting one of the internal metal strips in the first internal array to one of the external metal strips in the second external array, and a plurality of second terminals, each electrically connecting one of the external metal strips in the first external array to one of the internal metal strips in the second internal array, wherein each of the first terminals is separated from a second terminal by one of the insulation areas on each of the first and second external arrays.
More specifically, the step of isolating selected areas of the second and third metal layers includes the step of etching a series of parallel, linear interior isolation gaps in each of the second and third metal layers to form first and second internal arrays of isolated parallel metal strips. The interior isolation gaps in the second and third metal layers are staggered so that the isolated metal strips in the first internal array are staggered with respect to those in the second internal array. In other words, each of the metal strips in the first internal array overlaps portions of two adjacent strips in the second internal array, separated by an interior isolation gap in the third metal layer, and each of the metal strips in the second internal array underlies portions of two adjacent strips in the first internal array, separated by an isolation gap in the second metal layer.
The step of isolating selected areas of the first and fourth metal layers includes the steps of (a) forming a series of parallel linear slots through the laminated structure, each of the slots passing through the overlapping portions of one of the metal strips in the first internal array and one of the metal strips in the second internal array; and (b) etching a series of parallel, linear exterior isolation gaps in each of the first and fourth metal layers, wherein the exterior isolation gaps in the first metal layer are adjacent a first set of slots, and the exterior isolation gaps in the fourth metal layer are adjacent a second set of slots that alternate with the first set. Thus; the first external array of isolated metal strips comprises a first plurality of wide external metal strips in the first metal layer, each defined between a slot and an exterior isolation gap, while the second array of isolated metal strips comprises a second plurality of wide external metal strips in the fourth metal layer, each defamed between a slot and an external isolation gap, wherein the wide external metal strips in the first array are on the opposite sides of the slots from the wide external metal strips in the second array. Furthermore, because of the asymmetric spacing of the external isolation gaps between successive slots, each external isolation gap separates one of the wide external metal strips from a narrow external metal band, and each slot has a narrow metal band on one side and a wide metal strip on the other side.
The step of forming a plurality of insulation areas comprises the step of screen printing a layer of insulation material on both of the external surfaces of the laminated structure, so as to cover most (but not all) of each of the wide external metal strips and each of the narrow metal bands. The insulation layers are applied so that the external isolation gaps are filled with insulation material, but a portion of each of the wide external metal strips along each of the slots is left uncovered or exposed. A substantial portion of each of the narrow external metal bands along each of the slots is also left uncovered.
The step of forming the first and second terminals comprises the steps of: (a) metal plating (e.g., with copper) the interior wall surfaces of the slots and those portions of the external surfaces of the laminated structure that are not covered by the insulation material; and (b) solder plating over the metal-plated surfaces. The metal plating and the solder plating are thus applied to the interior wall surfaces of the slots, the exposed portions of the narrow external metal bands, and the exposed portions of the wide external metal strips.
The final step of the fabrication process comprises the step of singulating the laminated structure into a plurality of individual conductive polymer PTC devices, each of which has the structure described above. Specifically, the wide external metal strips in the first and fourth metal layers are formed, by the singulation step, respectively into first and second pluralities of external electrodes, while the isolated metal areas in the first and second internal arrays are thereby respectively formed into first and second pluralities of internal electrodes.
While a device having two conductive polymer PTC layers is described herein, it will be appreciated that a device having three or more such layers can be constructed in accordance with the present invention. Thus, the above-described fabrication method can be readily modified to manufacture devices with more than two conductive polymer PTC layers.